發明人：
Chen, Shin An | Yang, Sheng Hsing | Su, Yu Lin
專利摘要：
An embedded multi-functional preprocessing input data buffer comprises a clutter lock loop circuit, a multiplier, a mode selective multiplexer, a dual-port memory, an input multiplexer, self-testing circuit, decode circuit and an output multiplexer. The clutter lock loop and multiplication circuit selectively executes a coefficient multiplication or a clutter lock loop operation for the received data according to a working mode of the radar system. After receiving the data, the mode selective multiplexer may selectively output data processed by the clutter lock loop and multiplication circuit. The dual-port memory is coupled to the mode selective multiplexer for receiving and temporarily registering the data processed. The output multiplexer selectively outputs the data temporarily stored in the dual-port memory via a number of the output channels according to the working mode of the radar system.