| 專利摘要 | A radar signal processing (RSP) chip is used to process massive radar signals. The RSP chip includes a multiply and accumulate (MAC) array and a programmable delayer. The programmable delayer provides a concurrence alignment of the radar signals. The MAC array includes several MAC units. Each MAC unit can be set to either a parallel operation mode or a pipeline operation mode. Moreover, the RSP chip also includes a reference code generator, which further includes a look-up table circuit to store a data table for fast computation uses. A control unit is also included in the RSP chip for producing several control signals to control the operations. The RSP chips can be fabricated using VLSI technology and can be serially coupled one after another. |